Systolic sorting in a sequential input/output environment
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Publication:1068554
DOI10.1016/0167-8191(86)90003-7zbMath0582.68035OpenAlexW2025463474MaRDI QIDQ1068554
Publication date: 1986
Published in: Parallel Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/0167-8191(86)90003-7
systolic arraysystolic architecturemergingalgorithms for VLSIbit-parallel comparison-exchangeparallel sorting architecture
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