Description and reasoning of VLSI circuit in temporal logic

DOI10.1007/BF03037053zbMath0592.68033OpenAlexW2032056625MaRDI QIDQ1075756

Akira Fusaoka, Kuzuko Takahashi, Hirohisa Seki

Publication date: 1984

Published in: New Generation Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf03037053

zbMATH Keywords

VLSI designreasoningexpert systemautomaticbehavior of VLSI circuitsdesign verificationextended temporal logichardware specificationVLSI CAD system

Mathematics Subject Classification ID

Abstract data types; algebraic specification (68Q65) Applications of graph theory to circuits and networks (94C15)

Related Items (1)

Linear temporal logic vehicle routing with applications to multi-UAV mission planning

Cites Work

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• Theory of \(\omega\)-languages. I: Characterizations of \(\omega\)-context- free languages
• Hardware Specification with Temporal Logic: An Example
• Testing and generating infinite sequences by a finite automaton

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