Complete test-set generation for bridging faults in combinational-logic circuits

DOI10.1016/0020-0255(86)90025-3zbMath0594.94029OpenAlexW2078045066MaRDI QIDQ1077377

Sanjoy Kumar Basu, Jogesh Chandra Paul, Pramode Ranjan Bhattacharjee

Publication date: 1986

Published in: Information Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0255(86)90025-3

zbMATH Keywords

algorithmscombinational networksBoolean difference

Mathematics Subject Classification ID

Related Items (1)

Quick detection of faults in combinational networks designed in minterm format by computing a single novel parameter

Cites Work

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• An Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits
• Boolean Difference Calculus and Fault Finding

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