Polymorphic arrays: A novel VLSI layout for systolic computers

DOI10.1016/0022-0000(86)90042-5zbMath0612.68005OpenAlexW2076568053MaRDI QIDQ1088396

Amos Fiat, Adi Shamir

Publication date: 1986

Published in: Journal of Computer and System Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0022-0000(86)90042-5

zbMATH Keywords

lattice theoryparallel systolic computers

Mathematics Subject Classification ID

Cellular automata (computational aspects) (68Q80) Theory of software (68N99)

Related Items (5)

Polymorphic arrays: A novel VLSI layout for systolic computers ⋮ Two dimensional range minimum queries and Fibonacci lattices ⋮ MPC-in-multi-heads: a multi-prover zero-knowledge proof system (or: how to jointly prove any NP statements in ZK) ⋮ How to find a battleship ⋮ Tight bounds for minimax grid matching with applications to the average case analysis of algorithms

Cites Work

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• Polymorphic arrays: A novel VLSI layout for systolic computers
• Lectures on irregularities of distribution. (Notes by T. N. Shorey)
• Factoring polynomials with rational coefficients
• On Embedding Rectangular Grids in Square Grids
• On irregularities of distribution

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