A logic-topological calculus for the construction of integrated circuits. I

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zbMath0617.94013MaRDI QIDQ1088971

Reiner Kolla, Bernd Becker, Günter Hotz, Paul Molitor

Publication date: 1986

Published in: Informatik. Forschung und Entwicklung (Search for Journal in Brave)

zbMATH Keywords

VLSI design routing logic design layout placement recursion schemes automatic design of VLSI circuits calculus of nets logical-topological design

Mathematics Subject Classification ID

Applications of design theory to circuits and networks (94C30) Applications of graph theory to circuits and networks (94C15)

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An easily testable optimal-time VLSI-multiplier

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