Techniques for efficiently implementing totally self-checking checkers in MOS technology

DOI10.1016/0898-1221(87)90083-6zbMath0641.94039OpenAlexW2111029051MaRDI QIDQ1101080

B. George

Publication date: 1987

Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)

Full work available at URL: http://hdl.handle.net/2027.42/26970

zbMATH Keywords

m-out-of-n and Berger code checkersreducing the transistor count of MOS implementations of totally self- checking (TSC) checkers

Mathematics Subject Classification ID

Related Items (2)

Universal algorithm for synthesizing self-checking testers for constant- weight codes ⋮ Techniques for efficiently implementing totally self-checking checkers in MOS technology

Cites Work

• Techniques for efficiently implementing totally self-checking checkers in MOS technology
• Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor
• Note on Self-Checking Checkers
• On Totally Self-Checking Checkers for Separable Codes
• Efficient Design of Self-Checking Checker for any m-Out-of-n Code
• Complete Test Sets for Logic Functions

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