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On problem transformability in VLSI

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Publication:1101222
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DOI10.1007/BF01840352zbMath0642.68074MaRDI QIDQ1101222

Scot W. Hornick, Majid Sarrafzadeh

Publication date: 1987

Published in: Algorithmica (Search for Journal in Brave)


zbMATH Keywords

lower boundarea-time tradeoffVLSI model of computationproblem transformationcomputational prototype


Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25)


Related Items

The area-time complexity of the greatest common divisor problem: A lower bound ⋮ Semelectivity is not sufficient



Cites Work

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  • Tight chip area lower bounds for discrete Fourier and Walsh-Hadamard transformations
  • Area-time lower-bound techniques with applications to sorting
  • Lower bounds on communication complexity
  • Minimum Storage Sorting Networks
  • Information transfer and area-time tradeoffs for VLSI multiplication
  • The Area-Time Complexity of Binary Multiplication
  • Parallel Scheduling Algorithms
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