Efficient VLSI array processing structures for adaptive quadratic digital filters

DOI10.1007/BF01602100zbMath0643.93064OpenAlexW2083053915MaRDI QIDQ1102251

Yuang Lou, Chrysostomos L. Nikias, Anastasios N. Venetsanopoulos

Publication date: 1988

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01602100

zbMATH Keywords

LMS algorithmsystolic arraycostsadaptive quadratic filtersdata throughput delayVLSI parallel pipeline

Mathematics Subject Classification ID

Inference from stochastic processes and prediction (62M20) Analysis of algorithms and problem complexity (68Q25) Filtering in stochastic control theory (93E11) Adaptive control/observation systems (93C40) Theory of operating systems (68N25)

Related Items (1)

A systolic architecture for optimal filter design support

Cites Work

• Unnamed Item
• On the design of nonlinear discrete-time predictors (Corresp.)
• Adaptive Equalization of Channel Nonlinearities in QAM Data Transmission Systems

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