Automatic design and partitioning of systolic/wavefront arrays for VLSI

DOI10.1007/BF01602099zbMath0647.68027OpenAlexW2007109040MaRDI QIDQ1104739

Harry W. Nelis, E. F. A. Deprettere

Publication date: 1988

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01602099

zbMATH Keywords

signal processingVLSIsystolic/wavefront arrays

Mathematics Subject Classification ID

Related Items (2)

Automatic design and partitioning of systolic/wavefront arrays for VLSI ⋮ Optimal piecewise linear schedules for LSGP- and LPGS-decomposed array processors via quadratic programming

Cites Work

• Automatic design and partitioning of systolic/wavefront arrays for VLSI
• Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
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