The instruction systolic array and its relation to other models of parallel computers

DOI10.1016/0167-8191(88)90095-6zbMath0647.68028OpenAlexW2076937510MaRDI QIDQ1104742

Hans-Werner Lang, Manfred Kunde, Hartmut Schmeck, Heiko Schröder, Manfred Schimmler

Publication date: 1988

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(88)90095-6

zbMATH Keywords

VLSI architectureSIMDinstruction systolic arrayMIMDmesh-connected arraysmodels of parallel computers

Mathematics Subject Classification ID

Cellular automata (computational aspects) (68Q80) Theory of operating systems (68N25) Theory of software (68N99)

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A bit-serial floating-point unit for a massively parallel system on a chip ⋮ Parallel merging on the instruction systolic array

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