A compact layout for the three-dimensional tree of meshes

DOI10.1016/0893-9659(88)90066-3zbMath0649.05054OpenAlexW1982442007MaRDI QIDQ1105621

Charles E. Leiserson, Ronald I. Greenberg

Publication date: 1988

Published in: Applied Mathematics Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0893-9659(88)90066-3

zbMATH Keywords

embeddingtree of meshes graphVLSI graph layout

Mathematics Subject Classification ID

Graph theory (05C99)

Related Items (1)

UNIVERSAL ROUTING AND PERFORMANCE ASSURANCE FOR DISTRIBUTED NETWORKS

Cites Work

• Unnamed Item
• A framework for solving VLSI graph layout problems
• Three-Dimensional Circuit Layouts
• Universality considerations in VLSI circuits
• New lower bound techniques for VLSI

This page was built for publication: A compact layout for the three-dimensional tree of meshes