Floorplan design of VLSI circuits

DOI10.1007/BF01553890zbMath0661.94025MaRDI QIDQ1113879

S. H. Smith

Publication date: 1989

Published in: Algorithmica (Search for Journal in Brave)

zbMATH Keywords

simulated annealingfloorplan designVLSI circuit layout

Mathematics Subject Classification ID

Related Items (7)

Stochastic simulations of two-dimensional composite packings ⋮ Computing elastic moduli of two-dimensional random networks of rigid and nonrigid bonds by simulated annealing ⋮ Extensions to STaTS for practical applications of the facility layout problem ⋮ Stats: A slicing tree and tabu search based heuristic for the unequal area facility layout problem ⋮ A nonlinear optimization methodology for VLSI fixed-outline floorplanning ⋮ Applying ant system for solving unequal area facility layout problems ⋮ Floorplanning by graph dualization: \(L\)-shaped modules

Uses Software

• TimberWolf

Cites Work

• Unnamed Item
• Optimization by Simulated Annealing
• Optimal orientations of cells in slicing floorplan designs

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