Evaluating speedups on distributed memory architectures

DOI10.1016/0167-8191(89)90022-7zbMath0671.65022OpenAlexW2036447783MaRDI QIDQ1119334

Bernard Tourancheau, Michel Cosnard, Yves Robert

Publication date: 1989

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(89)90022-7

zbMATH Keywords

performance evaluationGaussian eliminationparallel algorithmsspeeduphypercube multiprocessor

Mathematics Subject Classification ID

Parallel numerical computation (65Y05) Direct numerical methods for linear systems and matrix inversion (65F05)

Related Items (5)

Symmetric matrix-vector product on a ring of processors ⋮ Data-movement-intensive problems: Two folk theorems in parallel computation revisited ⋮ Cost-effective modeling for natural resource distribution systems ⋮ Block-cyclic matrix triangulation on the Cartesian product of star graphs ⋮ UNIFIED PARALLEL ALGORITHMS FOR GAUSSIAN ELIMINATION WITH BACKWARD SUBSTITUTION ON PRODUCT NETWORKS

This page was built for publication: Evaluating speedups on distributed memory architectures