Dynamics of discrete automata
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Publication:1141481
DOI10.1007/BF01673629zbMath0437.68026MaRDI QIDQ1141481
V. N. Roginskij, A. I. Potekhin
Publication date: 1980
Published in: Journal of Soviet Mathematics (Search for Journal in Brave)
Cites Work
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- Automata theory
- Monotone Functions in Sequential Circuits
- Self-Synchronized Asynchronous Sequential Machines
- A logic hazard detection and elimination method
- Asynchronous Control Arrays
- Asynchronous Sequential Machines Designed for Fault Detection
- Space-continuous time-semicontinuous theory of speed-independent asynchronous circuits
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- A Method for the Realization of Fail-Safe Asynchronous Sequential Circuits
- Fault-Tolerant Asynchronous Sequential Machines
- A Fail-Safe Asynchronous Sequential Machine
- Generation of Internal State Assignments for Large Asynchronous Sequential Machines
- Generation of Design Equations in Asynchronous Sequential Circuits
- State Assignment Selection in Asynchronous Sequential Circuits
- Design of Asynchronous Unit Delays
- Realization Methods for Asynchronous Sequential Circuits
- Pulse Input Asynchronous Sequential Circuits
- Analysis and Synthesis of Asynchronous Sequential Networks Using Edge-Sensitive Flip-Flops
- The Avoidance and Elimination of Function Hazards in Asynchronous Sequential Circuits
- On Delayed-Input Asynchronous Sequential Circuits
- A Theory of Asynchronous Control Networks
- Influence of state reduction on the number of state variables in race-free asynchronous sequential circuits
- Realization of Fail-Safe Sequential Machines by Using a k-out-of-n Code
- State Assignment of Asynchronous Sequential Machines Using Graph Techniques
- Elimination of static and dynamic hazards for multiple input changes in combinational switching circuits
- Next-State Equations of Asynchronous Sequential Machines
- State Assignments for Asynchronous Sequential Machines
- A Characterization of Some Asynchronous Sequential Networks and State Assignments
- Fault-Tolerant Asynchronous Networks
- Augmented Parity Check Codes for Encoding of Asynchronous Sequential Machines
- Hazard Correction in Asynchronous Sequential Circuits Using Inertial Delay Elements
- Note on Hazard Elimination
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