Improved 0/1-interchange scheduling
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Publication:1169295
DOI10.1007/BF01934441zbMath0494.68040MaRDI QIDQ1169295
Publication date: 1982
Published in: BIT (Search for Journal in Brave)
multiprocessor schedulingworst-case performanceworst-case analysisapproximation algorithmsidentical processors22, 282-290 (1982)
Deterministic scheduling theory in operations research (90B35) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)
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Cites Work
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