Computations over finite monoids and their test complexity

DOI10.1016/0304-3975(91)90161-TzbMath0743.68084MaRDI QIDQ1178692

Bernd Becker, Uwe Sparmann

Publication date: 26 June 1992

Published in: Theoretical Computer Science (Search for Journal in Brave)

zbMATH Keywords

generation for electronic circuitstest pattern

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Symbolic computation and algebraic computation (68W30)

Related Items (1)

Some remarks on the test complexity of iterative logic arrays

Cites Work

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• An easily testable optimal-time VLSI-multiplier
• Testing in two-dimensional iterative logic arrays
• Depth-size trade-offs for parallel prefix computation
• Parallel Prefix Computation
• A design of programmable logic arrays with universal tests
• Design of Testable Structures Defined by Simple Loops
• A Regular Layout for Parallel Adders
• The Complexity of Fault Detection Problems for Combinational Logic Circuits
• Size-time complexity of Boolean networks for prefix computations
• On Realizations of Boolean Functions Requiring a Minimal or Near-Minimal Number of Tests

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