A bound analysis of scheduling instructions on pipelined processors with a maximal delay of one cycle
From MaRDI portal
Publication:1195173
DOI10.1016/0167-8191(92)90135-TzbMath0792.68013MaRDI QIDQ1195173
Chung-Ping Chung, Hong-Chich Chou
Publication date: 7 October 1992
Published in: Parallel Computing (Search for Journal in Brave)
Analysis of algorithms and problem complexity (68Q25) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)
This page was built for publication: A bound analysis of scheduling instructions on pipelined processors with a maximal delay of one cycle