Stirling networks: A versatile combinatorial topology for multiprocessor systems

DOI10.1016/0166-218X(92)90128-WzbMath0768.68134OpenAlexW2038379263MaRDI QIDQ1199419

Joydeep Ghosh, Sajal K. Das, Narsingh Deo

Publication date: 16 January 1993

Published in: Discrete Applied Mathematics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0166-218x(92)90128-w

zbMATH Keywords

cycleparallel algorithmspathtreesrouting schemevulnerabilityVLSIlayoutlabelsmultiprocessor interconnection networkscombinatorial networksembedding routing algorithmfault-handlingStirling graph treeStirling networkStirling table

Mathematics Subject Classification ID

Trees (05C05) Graph theory (including graph drawing) in computer science (68R10) Planar graphs; geometric and topological aspects of graph theory (05C10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Graph labelling (graceful graphs, bandwidth, etc.) (05C78) Distributed algorithms (68W15)

Related Items (2)

The folded Petersen network: A new versatile multiprocessor interconnection topology ⋮ Reverse binary graphs

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