Efficient VLSI fault simulation
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Publication:1203708
DOI10.1016/0898-1221(93)90219-LzbMath0760.94020MaRDI QIDQ1203708
Publication date: 22 February 1993
Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)
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- Boolean calculus of differences
- The complexity of partial derivatives
- Test Routines Based on Symbolic Logical Statements
- Random Pattern Testability
- Logic Test Pattern Generation Using Linear Codes
- Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing
- Bounding Signal Probabilities in Combinational Circuits
- LSI logic testing — An overview
- The Complexity of Fault Detection Problems for Combinational Logic Circuits
- Boolean Differential Calculus and its Application to Switching Theory
- The Weighted Random Test-Pattern Generator
- Efficiency of Random Compact Testing
- Comparison of Parallel and Deductive Fault Simulation Methods
- Diagnosis of Automata Failures: A Calculus and a Method
- Multi-threshold threshold elements
- Analyzing Errors with the Boolean Difference
- Functional Partitioning and Simulation of Digital Circuits
- A Deductive Method for Simulating Faults in Logic Circuits
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