Design for delay verifiability

DOI10.1007/BF02946611zbMath0920.68010OpenAlexW2140287654MaRDI QIDQ1288419

Yinghua Min, Xiaoming Yu

Publication date: 11 May 1999

Published in: Journal of Computer Science and Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf02946611

zbMATH Keywords

testabilitydigital circuits

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

Cites Work

• A calculus of durations
• Models for reactivity

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