Timing diagrams: Formalization and algorithmic verification

DOI10.1023/A:1008345113376zbMath0941.03032MaRDI QIDQ1306169

Kathi Fisler

Publication date: 22 September 1999

Published in: Journal of Logic, Language and Information (Search for Journal in Brave)

zbMATH Keywords

model checkingBüchi automatahardware design\(\omega\)-regular languagescomputer-aided verificationlanguage containmentreversal bounded counter machine languagestiming diagram logic

Mathematics Subject Classification ID

Logic in computer science (03B70) Automata and formal grammars in connection with logical questions (03D05) Specification and verification (program logics, model checking, etc.) (68Q60) Decidability of theories and sets of sentences (03B25) Mathematical problems of computer architecture (68M07)

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