Special purpose hardware for discrete Fourier transform implementation

DOI10.1016/0167-8191(94)90082-5zbMath0798.65128OpenAlexW2033268762MaRDI QIDQ1319523

Michael Conner, Richard Tolimieri

Publication date: 30 October 1994

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(94)90082-5

zbMATH Keywords

discrete Fourier transformFourier matrixparallel hardware implementationpipeline timing resultspre-addition stages

Mathematics Subject Classification ID

Numerical methods for discrete and fast Fourier transforms (65T50) Parallel numerical computation (65Y05) Numerical algorithms for specific classes of architectures (65Y10)

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