A circuit for exact summation of floating-point numbers

DOI10.1016/0020-0190(95)00205-7zbMath0900.68008OpenAlexW2074633834MaRDI QIDQ1351592

Christine Rüb, Michael Müller, Wolfgang Rülling

Publication date: 27 February 1997

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(95)00205-7

zbMATH Keywords

Scientific computationInner productComputer architectureNumerical computationFloating-point arithmeticArithmetic chip

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

Related Items (1)

The factorability of symmetric matrices and some implications for statistical linear models

Uses Software

• Pascal-SC

Cites Work

• FORTRAN-SC. A study of a FORTRAN extension for engineering/scientific computation with access to ACRITH
• Solving nonlinear systems with least significant bit accuracy
• Systolic super summation
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