On fault-tolerant embedding of Hamiltonian circuits in line digraph interconnection networks

DOI10.1016/0020-0190(96)00011-7zbMath0875.68044OpenAlexW1974826355MaRDI QIDQ1351611

Éva Czabarka, Abhijit Sengupta, Suresh Viswanathan

Publication date: 27 February 1997

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(96)00011-7

zbMATH Keywords

Hamiltonian circuitFault toleranceEmbeddingDeBruijn and Kautz digraphs

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10)

Related Items (1)

Fault-Hamiltonicity of Cartesian products of directed cycles

Cites Work

• Compatible Euler tours for transition systems in Eulerian graphs
• Large fault-tolerant interconnection networks
• On the numbers of spanning trees and Eulerian tours in generalized de Bruijn graphs
• Parallel concepts in graph theory
• Connectivity of Regular Directed Graphs with Small Diameters
• Unnamed Item
• Unnamed Item

This page was built for publication: On fault-tolerant embedding of Hamiltonian circuits in line digraph interconnection networks