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Method of constructing parallel forms of algorithms based on locally parallel, globally sequential partition

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Publication:1364074
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DOI10.1007/BF02366530zbMath0879.68057OpenAlexW2021179831MaRDI QIDQ1364074

A. A. Tiunchik, N. A. Likhoded

Publication date: 12 January 1998

Published in: Cybernetics and Systems Analysis (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf02366530


zbMATH Keywords

global interconnectionsVLSI processors


Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Distributed algorithms (68W15)


Related Items (1)

Localization of edges in graph models of two-level algorithms



Cites Work

  • Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays




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