The hyperstar interconnection network

DOI10.1006/JPDC.1997.1414zbMath0896.68017OpenAlexW1978129423MaRDI QIDQ1388142

Abdel-Elah Al-Ayyoub, Khaled Day

Publication date: 8 June 1998

Published in: Journal of Parallel and Distributed Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1006/jpdc.1997.1414

zbMATH Keywords

fault toleranceHamiltonian cyclesparallel pathsVLSI layoutsmultiprocessor interconnection topology

Mathematics Subject Classification ID

Computer system organization (68M99)

Related Items (3)

Performance modeling of Cartesian product networks ⋮ UNIFIED PARALLEL ALGORITHMS FOR GAUSSIAN ELIMINATION WITH BACKWARD SUBSTITUTION ON PRODUCT NETWORKS ⋮ EFFICIENT ALGORITHMS ON THE HYPERSTAR NETWORK

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