A local-sparing design methodology for fault-tolerant multiprocessors

DOI10.1016/S0898-1221(97)00217-4zbMath0899.68013MaRDI QIDQ1388972

Shantanu Dutt, John P. Hayes

Publication date: 11 June 1998

Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)

zbMATH Keywords

design methodologyfault-tolerant multiprocessorslocal-sparing designs

Mathematics Subject Classification ID

Computer system organization (68M99)

Cites Work

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• Optimal computation of prefix sums on a binary tree of processors
• Designing fault-tolerant systems using automorphisms
• Reconfigurable Tree Architectures Using Subtree Oriented Fault Tolerance
• Parallel Matrix and Graph Algorithms
• Parallel permutation and sorting algorithms and a new generalized connection network
• A Graph Model for Fault-Tolerant Computing Systems
• The Indirect Binary n-Cube Microprocessor Array
• Wildcard dimensions, coding theory and fault-tolerant meshes and hypercubes
• Optimization of Reduced Dependencies for Synchronous Sequential Machines

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