Using knowledge-based techniques on loop parallelization for parallelizing compilers

DOI10.1016/S0167-8191(96)00090-7zbMath0907.68044OpenAlexW2012102266WikidataQ123197139 ScholiaQ123197139MaRDI QIDQ1391819

Wen-Chung Shih, Chao-Tung Yang, Cheng-Der Chuang, Shian-Shyong Tseng

Publication date: 23 July 1998

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0167-8191(96)00090-7

zbMATH Keywords

speedupparallelizing compilerdata dependence testingknowledge-basedloop parallelizationparallel loop schedulingrepertory grid analysis

Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20)

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