A highly flexible, distributed multiprocessor architecture for network processing.

DOI10.1016/S1389-1286(02)00450-4zbMath1045.68025OpenAlexW1969457326MaRDI QIDQ1400370

Raj Yavatkar, Prashant Chandra, Muthu Venkatachalam

Publication date: 13 August 2003

Published in: Computer Networks (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s1389-1286(02)00450-4

zbMATH Keywords

ATMProgrammingMedia gatewayAAL2IXPMedia signal processorNetwork processorPipeliningTraffic management

Mathematics Subject Classification ID

Distributed systems (68M14)

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