Reducing switching activity of subtraction via variable truncation of the most-significant bits

DOI10.1023/A:1021193802261zbMath1039.68008OpenAlexW1505572275MaRDI QIDQ1405462

Vasily G. Moshnyaga

Publication date: 25 August 2003

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1021193802261

zbMATH Keywords

video processinglow-power designbit-truncationswitching activity

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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