Expansion of layouts of complete binary trees into grids

DOI10.1016/S0166-218X(02)00550-4zbMath1046.68080MaRDI QIDQ1414240

D. Massart

Publication date: 20 November 2003

Published in: Discrete Applied Mathematics (Search for Journal in Brave)

zbMATH Keywords

optimal VLSI design

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Planar graphs; geometric and topological aspects of graph theory (05C10)

Related Items

Complexity dichotomy on degree-constrained VLSI layouts with unit-length edges, Complete binary trees embeddings in Möbius cubes, Complexity dichotomy on partial grid recognition

Cites Work

• The complexity of minimizing wire lengths in VLSI layouts
• Unit-length embedding of binary trees on a square grid
• Optimizing area and aspect ratio in straight-line orthogonal tree drawings
• Embeddings of complete binary trees into grids and extended grids with total vertex-congestion 1
• Efficient Embeddings of Binary Trees in VLSI Arrays
• Universality considerations in VLSI circuits
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