Fault-tolerant systems with concurrent error-locating capability

DOI10.1007/BF02948884zbMath1089.68518OpenAlexW2150043699MaRDI QIDQ1429430

JianHui Jiang, ChengLian Peng, Yinghua Min

Publication date: 18 May 2004

Published in: Journal of Computer Science and Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf02948884

zbMATH Keywords

fault-tolerant systemconcurrent error correctionconcurrent error locationdual-module redundancyrobust fault-masking

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

Cites Work

• An Algebraic Model of Fault-Masking Logic Circuits
• The design of totally self-checking TMR fault-tolerant systems
• A general constructive approach to fault-tolerant design using redundancy

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