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Logic synthesis method for power dissipation reduction in combinational digital circuits - MaRDI portal

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Logic synthesis method for power dissipation reduction in combinational digital circuits

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Publication:1596528

zbMATH Open0997.94555MaRDI QIDQ1596528

Author name not available (Why is that?)

Publication date: 22 May 2002

Published in: (Search for Journal in Brave)




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