VLSI implementation of the multistage detector for next generation wideband CDMA receivers

DOI10.1023/A:1014086523082zbMath0996.68589OpenAlexW1764450500MaRDI QIDQ1597576

Joseph R. Cavallaro, Sridhar Rajagopal, Gang Xu, Behnaam Aazhang

Publication date: 30 May 2002

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1014086523082

zbMATH Keywords

multistage detection algorithmwidemand code division multiple access

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Computing methodologies and applications (68U99) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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