Reducing cache conflicts by multi-level cache partitioning and array elements mapping

DOI10.1023/A:1014982819342zbMath1014.68029OpenAlexW3109982023MaRDI QIDQ1604789

Chih-Yung Chang, Hsi-Chiuen Chen, Jang-Ping Sheu

Publication date: 8 July 2002

Published in: The Journal of Supercomputing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1014982819342

zbMATH Keywords

cache conflictscache localities

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computer system organization (68M99)

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