Verification of arithmetic circuits using binary moment diagrams

DOI10.1007/s100090100037zbMath1002.68588OpenAlexW1520753950WikidataQ126568026 ScholiaQ126568026MaRDI QIDQ1606802

Yirng-An Chen, Randal E. Bryant

Publication date: 25 July 2002

Published in: International Journal on Software Tools for Technology Transfer. STTT (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s100090100037

Mathematics Subject Classification ID

Computer science aspects of computer-aided design (68U07) Network design and communication in computer systems (68M10) Computing methodologies and applications (68U99)

Related Items (2)

Incremental column-wise verification of arithmetic circuits using computer algebra ⋮ Formal Verification of Integer Multiplier Circuits Using Algebraic Reasoning: A Survey

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