Reconfigurable media processing

DOI10.1016/S0167-8191(02)00107-2zbMath0998.68007OpenAlexW2612788302MaRDI QIDQ1608877

Aravind Dasu, Sethuraman Panchanathan

Publication date: 13 August 2002

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0167-8191(02)00107-2

zbMATH Keywords

multimedia processing

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10)

Related Items (2)

Avoiding conversion and rearrangement overhead in SIMD architectures ⋮ Optimizing pipeline for a RISC processor with multimedia extension ISA

This page was built for publication: Reconfigurable media processing