CMOS realization of all-positive pinched hysteresis loops

DOI10.1155/2017/7863095zbMath1373.94954OpenAlexW2743937810MaRDI QIDQ1674964

B. J. Maundy, Costas Psychalinos, Ahmed S. Elwakil

Publication date: 26 October 2017

Published in: Complexity (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1155/2017/7863095

zbMATH Keywords

nonlinear circuitsall-positive pinched hysteresis loopcharge-controlled resistance (memristance)NMOS transistors

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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