Assessment of hiding the higher-order leakages in hardware. What are the achievements versus overheads?

DOI10.1007/978-3-662-48324-4_23zbMath1381.94083OpenAlexW2290618025MaRDI QIDQ1695898

Alexander Wild, Amir Moradi

Publication date: 14 February 2018

Full work available at URL: https://doi.org/10.1007/978-3-662-48324-4_23

Mathematics Subject Classification ID

Cryptography (94A60) Mathematical problems of computer architecture (68M07)

Related Items (8)

Spin me right round rotational symmetry for FPGA-specific AES: extended version ⋮ Side-Channel Analysis Protection and Low-Latency in Action ⋮ Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations ⋮ Cryptanalysis of masked ciphers: a not so random idea ⋮ Hiding Higher-Order Side-Channel Leakage ⋮ Threshold Implementation in Software ⋮ Affine Equivalence and Its Application to Tightening Threshold Implementations ⋮ ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks

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