Uniform first-order threshold implementations
From MaRDI portal
Publication:1698616
DOI10.1007/978-3-319-69453-5_5zbMath1412.94154OpenAlexW2575775666MaRDI QIDQ1698616
Publication date: 16 February 2018
Full work available at URL: https://doi.org/10.1007/978-3-319-69453-5_5
Related Items (4)
Spin me right round rotational symmetry for FPGA-specific AES: extended version ⋮ Mind the \texttt{TWEAKEY} schedule: cryptanalysis on \texttt{SKINNYe-64-256} ⋮ Hiding Higher-Order Side-Channel Leakage ⋮ Lightweight authenticated encryption mode suitable for threshold implementation
Cites Work
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Secure hardware implementation of nonlinear functions in the presence of glitches
- Side-channel resistant crypto for less than 2,300 GE
- Threshold implementations of small S-boxes
- On ``bent functions
- Piecewise constructions of bent and almost optimal Boolean functions
- Power Analysis of Atmel CryptoMemory – Recovering Keys from Secure EEPROMs
- Higher-Order Threshold Implementations
- Pushing the Limits: A Very Compact and a Threshold Implementation of AES
- Enabling 3-Share Threshold Implementations for all 4-Bit S-Boxes
- Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
- Algebraic Decomposition for Probing Security
- Consolidating Masking Schemes
- A Very Compact S-Box for AES
- On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme
- Threshold Implementations of All 3 ×3 and 4 ×4 S-Boxes
- Unifying Leakage Models: From Probing Attacks to Noisy Leakage.
This page was built for publication: Uniform first-order threshold implementations