Optimized 4-bit quantum reversible arithmetic logic unit
From MaRDI portal
Publication:1700857
DOI10.1007/S10773-017-3426-3zbMath1383.81053OpenAlexW2618728455MaRDI QIDQ1700857
Slimani Ayyoub, Benslama Achour
Publication date: 22 February 2018
Published in: International Journal of Theoretical Physics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10773-017-3426-3
Related Items (2)
A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size ⋮ Optimal designs of reversible/quantum decoder circuit using new quantum gates
Cites Work
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Optimization approaches for designing quantum reversible arithmetic logic unit
- Depth-optimized reversible circuit synthesis
- Conservative logic
- Novel design for reversible arithmetic logic unit
- Reversible arithmetic logic unit for quantum arithmetic
- Towards a Design Flow for Reversible Logic
- Irreversibility and Heat Generation in the Computing Process
- Logical Reversibility of Computation
This page was built for publication: Optimized 4-bit quantum reversible arithmetic logic unit
