Designing novel quaternary quantum reversible subtractor circuits

DOI10.1007/s10773-017-3556-7zbMath1387.81152OpenAlexW2762247217MaRDI QIDQ1703508

Majid Haghparast, Asma Taheri Monfared

Publication date: 2 March 2018

Published in: International Journal of Theoretical Physics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10773-017-3556-7

zbMATH Keywords

quantum computingreversible logicmultiple valued logicquaternary subtractor circuit

Mathematics Subject Classification ID

Quantum computation (81P68) Analytic circuit theory (94C05) Many-valued logic (03B50)

Related Items (2)

T-count optimized Wallace tree integer multiplier for quantum computing ⋮ Quaternary quantum/reversible half-adder, full-adder, parallel adder and parallel adder/subtractor circuits

Cites Work

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• Novel quaternary quantum decoder, multiplexer and demultiplexer circuits
• Design of a novel quantum reversible ternary up-counter
• Irreversibility and Heat Generation in the Computing Process
• Quantum Cryptography with 3-State Systems
• Design of new reversible quaternary flip-flops
• Logical Reversibility of Computation

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