A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
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Publication:1741482
DOI10.1515/dma-2019-0005zbMath1454.94146OpenAlexW2917031641WikidataQ128315479 ScholiaQ128315479MaRDI QIDQ1741482
Elena Yu. Romanova, Dmitry S. Romanov
Publication date: 3 May 2019
Published in: Discrete Mathematics and Applications (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1515/dma-2019-0005
Fault detection; testing in circuits and networks (94C12) Analytic circuit theory (94C05) Switching theory, applications of Boolean algebras to circuits and networks (94C11)
Related Items (6)
The length of a single fault detection test for constant-nonpreserving element insertions ⋮ The length of single-fault detection tests with respect to substitution of inverters for combinational elements in some bases ⋮ Some classes of easily testable circuits in the Zhegalkin basis ⋮ Lower bound of the length of a single fault diagnostic test with respect to insertions of a mod-2 adder ⋮ The length of single fault detection tests with respect to substitution of gates with inverters ⋮ On self-correcting logic circuits of unreliable gates with at most two inputs
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