A methodology for speeding up loop kernels by exploiting the software information and the memory architecture

DOI10.1016/j.cl.2015.01.003zbMath1387.68065OpenAlexW2019718260WikidataQ57592860 ScholiaQ57592860MaRDI QIDQ1749110

Vasilios Kelefouras, Costas Goutis, Angeliki Kritikakou

Publication date: 15 May 2018

Published in: Computer Languages, Systems \& Structures (Search for Journal in Brave)

Full work available at URL: http://shura.shu.ac.uk/18360/1/Kelefouras-MethodologyForSpeedingUpLoopKernals%28AM%29.pdf

zbMATH Keywords

optimizationmemory hierarchydata reuseDiophantine equationsdata localityloop tilingregister allocation

Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20)

Related Items (2)

A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details ⋮ A methodology for speeding up loop kernels by exploiting the software information and the memory architecture

Uses Software

• PHiPAC
• Eigen
• MKL
• OpenCV
• GotoBLAS

Cites Work

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• Adaptive optimizing compilers for the 21st century
• Optimal register allocation for SSA-form programs in polynomial time
• A methodology for speeding up loop kernels by exploiting the software information and the memory architecture
• Data Structures and Algorithms
• A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization

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