A fault-tolerant message passing algorithm and its hardware implementation

DOI10.1016/J.ADVENGSOFT.2004.10.005zbMath1062.68029OpenAlexW2031367304WikidataQ58841209 ScholiaQ58841209MaRDI QIDQ1765739

Xianqiang Yang

Publication date: 23 February 2005

Published in: Advances in Engineering Software (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.advengsoft.2004.10.005

zbMATH Keywords

Hardware implementationMessage passingProcessor arraysFault-tolerant

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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