Diagonal balanced truncation of discrete delay systems

DOI10.1016/S0005-1098(99)00094-1zbMath0937.93010OpenAlexW1964328379MaRDI QIDQ1805808

Young Soo Suh

Publication date: 14 June 2000

Published in: Automatica (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0005-1098(99)00094-1

zbMATH Keywords

model reductiondiscrete delay systemsdiagonal balanced realization

Mathematics Subject Classification ID

Discrete-time control/observation systems (93C55) System structure simplification (93B11)

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