Designing of processor-time optimal systolic arrays for band matrix-vector multiplication

DOI10.1016/0898-1221(96)00100-9zbMath0857.65049OpenAlexW2021848155WikidataQ126407828 ScholiaQ126407828MaRDI QIDQ1816677

I. Z. Milentijević, Igor Ž. Milovanović, Mile K. Stojčev, Emina I. Milovanović

Publication date: 20 February 1997

Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0898-1221(96)00100-9

zbMATH Keywords

mappingsystolic arraysdata dependencyband matrix-vector multiplication

Mathematics Subject Classification ID

Related Items (2)

Synthesis of a unidirectional systolic array for matrix-vector multiplication ⋮ Matrix-vector multiplication on a fixed-size linear systolic array

Cites Work

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• Synthesizing systolic arrays from recurrence equations
• Spacetime representations of computational structures
• VLSI systems for band matrix multiplication
• Array size anomaly of problem-size independent systolic arrays for matrix-vector multiplication
• Design and analysis of systolic algorithms and structures
• A methodology for algorithm regularization and mapping into time-optimal VLSI arrays
• Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays

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