A systolic, high speed architecture for an RSA cryptosystem
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Publication:1851100
DOI10.1023/A:1020264818843zbMath1014.68061OpenAlexW1534639970MaRDI QIDQ1851100
N. K. Moshopoulos, K. Z. Pekmestzi
Publication date: 15 December 2002
Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1023/a:1020264818843
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