The flagged prefix adder and its applications in integer arithmetic
From MaRDI portal
Publication:1851177
DOI10.1023/A:1015421507166zbMath1041.68136OpenAlexW1483875443MaRDI QIDQ1851177
Publication date: 15 December 2002
Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1023/a:1015421507166
Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Computer system organization (68M99)
This page was built for publication: The flagged prefix adder and its applications in integer arithmetic