Formal design of cache memory protocols in IBM

DOI10.1023/A:1022921522163zbMath1020.68009OpenAlexW2062390281MaRDI QIDQ1870225

Steven M. German

Publication date: 11 May 2003

Published in: Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1023/a:1022921522163

zbMATH Keywords

protocol verificationcache memory protocolformal design of hardwareMurphi verifier

Mathematics Subject Classification ID

Network protocols (68M12)

Related Items (1)

Efficient methods for formally verifying safety properties of hierarchical cache coherence protocols

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